1. Field
The present embodiments relate to a liquid crystal display device and a driving method thereof.
2. Related Art
Generally, a liquid crystal display device controls the light transmittance of liquid crystal by use of electric field, thereby displaying a picture. The liquid crystal display device includes a liquid crystal display panel where liquid crystal cells are arranged in a matrix shape and a drive circuit for driving the liquid crystal display panel.
In the liquid crystal display panel, as shown in FIG. 1, gate lines GL cross data lines DL, and a thin film transistor TFT for driving a liquid crystal cell is formed at each of the crossing parts of the gate lines GL and the data lines DL. The thin film transistor TFT supplies a data voltage Vd from the data line to a pixel electrode Ep of the liquid crystal cell Clc in response to a scan signal supplied through the gate line GL.
A gate electrode of the thin film transistor TFT is connected to the gate line GL. A source electrode of the thin film transistor TFT is connected to the data line DL. A drain electrode of the thin film transistor TFT is connected to the pixel electrode of the liquid crystal cell Clc. The liquid crystal cell Clc is charged with a potential difference between the data voltage Vd supplied to the pixel electrode Ep and the common voltage Vcom supplied to the common electrode Ec. The arrangement of liquid crystal molecules is changed by the electric field formed by the potential difference to control the amount of the transmitted light or to block the light.
The common electrode Ec is formed in the upper substrate and the lower substrate of the liquid crystal display panel in accordance with a method of applying the electric field to the liquid crystal cell Clc. A storage capacitor Cst for keeping a charge voltage of the liquid crystal cell Clc is formed between the common electrode Ec and the pixel electrode Ep.
The liquid crystal display panel is driven by an inversion method where the polarity of the data voltage Vd is inverted for each fixed period in order to prevent the deterioration of the liquid crystal cell Clc. The inversion method includes a dot inversion method, a line inversion method, a column inversion method, and a frame inversion method.
FIG. 2 represents drive voltages supplied to the liquid crystal display panel which is driven by a line inversion method. In FIG. 2, ‘Vg’ is a scan signal supplied to the gate line GL, ‘Vd’ is a data voltage supplied to the data line DL, ‘Vcom’ is a common voltage supplied to the common electrode Ec of the liquid crystal cells Clc, and ‘Vlc’ is a data voltage with which the liquid crystal cell Clc is charged or discharged.
Referring to FIG. 2, in the driving of the line inversion method, the common voltage Vcom is supplied as a fixed DC voltage. The data voltage Vd has its polarity inverted on the basis of the common voltage Vcom for each horizontal period 1H. If a normal black mode is assumed, the transmittance of the light transmitted through the liquid crystal layer is increased as the potential difference between the data voltage Vd and the common voltage Vcom is increased. The transmittance of the light transmitted through the liquid crystal layer is decreased as the potential difference of the data voltage Vd and the common voltage Vcom is reduced.
The scan signal Vg swings between a gate high voltage Vgh which is set as a voltage for turning on the thin film transistor TFT and a gate low voltage Vgl which is set as a voltage for turning off the thin film transistor TFT. The liquid crystal cell Clc is charged with the data voltage Vd supplied as a gamma voltage and maintains the charged voltage for a fixed time for a scan period while the scan signal Vg maintains the gate high voltage Vgh.
Alternatively, the voltage charged in the liquid crystal cell Clc and the storage capacitor Cst for the scan period, when the thin film transistor TFT maintains a turn-on state, should last after the thin film transistor TFT is changed to a turn-off state, but a charge voltage of the liquid crystal cell Clc is shifted by ΔVp because of a parasitic capacitor Cgd between the gate electrode and the drain electrode of the thin film transistor TFT. The ΔVp is a kickback voltage or feed-through voltage. The feed-through voltage ΔVp is generally calculated by a formula shown in Mathematical Formula 1 below.ΔVp=(Cgd×ΔVg)/(Cgd+Clc+Cst)  [Mathematical Formula 1]
Herein, ‘ΔVp’ is a feed-through voltage. ‘Cgd’ is a parasitic capacitance between the gate electrode and the drain electrode of the thin film transistor TFT. ‘Clc’ is a capacitance which is equivalently formed in the liquid crystal cell Clc. ‘Cst’ is a capacitance of a storage capacitor Cst. ‘ΔVg’ is a difference voltage between the gate high voltage Vgh and the gate low voltage Vgl.
The liquid crystal cell Clc is charged with a voltage which is lower by ΔVp than the data voltage Vd corresponding to the video data due to the feed-through voltage ΔVp, i.e., the liquid crystal cell Clc is charged with a voltage having a potential difference lower by ΔVp than the data voltage Vd in relation to the common voltage Vcom when driven in a positive (+) polarity. The liquid crystal cell Clc is charged with a voltage having a potential difference higher by ΔVp than the data voltage Vd in relation to the common voltage Vcom when driven in a negative (−) polarity. Accordingly, a flicker or residual image appears in a screen of the liquid crystal display panel due to a voltage offset in relation to the common voltage. The common voltage Vcom is adjusted by the voltage offset caused by the feed-through voltage ΔVp in the related art.
In relation to the positive (+) and negative (−) data voltages Vd which express the same gray level, a difference Vgd between the data voltage Vd and the gate high voltage Vgh when driven in the positive (+) polarity is different from a difference Vgd between the data voltage Vd and the gate high voltage Vgh when driven in the negative (−) polarity. The charge amount charged in the parasitic capacitor Cgd between the gate electrode and the drain electrode of the thin film transistor TFT is different when driven in the positive (+) polarity and when driven in the negative (−) polarity. The feed-through voltage ΔVp when driven in the positive (+) polarity becomes different from the feed-through voltage ΔVp when driven in the negative (−) polarity.
For example, the liquid crystal display panel is driven with a scan signal which swings between the gate low voltage Vgl of −5V and the gate high voltage Vgh of 25V, a common voltage of 7V, and a data voltage Vd of 14V which swings between 0V and 14V. In this example, the difference Vgd of the gate high voltage Vgh and the data voltage Vd is 11V when driven in the positive (+) polarity, but the difference Vgd of the gate high voltage Vgh and the data voltage Vd is 25V when driven in the negative (−) polarity. In this example, 14V and 0V represents the white gray level in the positive (+) driving and in the negative (−) driving, respectively. Accordingly, a simulation of the feed-through voltage ΔVp, the feed-through voltage ΔVp in the positive (+) driving is 1.121V, but the feed-through voltage ΔVp in the negative (−) driving is 1.531V.
For example, there is a difference of about 400 mV between the feed-through voltage ΔVp in the positive (+) driving and the feed-through voltage ΔVp in the negative (−) driving. In case the feed-through voltage ΔVp in the positive (+) driving is different from the feed-through voltage ΔVp in the negative (−) driving, the flickers and residual images become worse as the difference is increased. This problem is even further increased when being driven by a line inversion method rather than by a dot inversion method, among the inversion methods which designates a positive and negative inversion cycle.